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HYB511000BJ- Datasheet, PDF (7/22 Pages) Siemens Semiconductor Group – 1 M x 1-Bit Dynamic RAM Low Power 1 M ´ 1-Bit Dynamic RAM
HYB 511000BJ/BJL-50/-60/-70
1 M × 1-DRAM
AC Characteristics 4) 13)
TA = 0 to 70 ˚C; VCC = 5 V ± 10 %; tT = 5 ns
Parameter
Symbol
Limit Values
Unit
-50
-60
-70
min. max. min. max. min. max.
Random read or write
tRC
95
–
110 –
130 –
ns
cycle time
Read-write cycle time
tRWC
115 –
130 –
155 –
ns
Fast page mode cycle tPC
35
–
40
–
45
–
ns
time
Fast page mode read- tPRWC 55
–
60
–
70
–
ns
write cycle time
Access time from
tRAC
–
50
–
60
–
70
ns
RAS
6) 11)
Access time from
tCAC
–
15
–
15
–
20
ns
CAS
6) 11)
Access time from column tAA
–
25
–
30
–
35
ns
address
6) 12)
Access time from CAS tCPA
–
30
–
35
–
40
ns
precharge
6)
CAS to output in low-Z 6) tCLZ
0
–
0
–
0
–
ns
Output buffer turn-off
tOFF
0
15
0
20
0
20
ns
delay
7)
Transition time
(rise and fall)
tT
5)
3
50
3
50
3
50
ns
RAS precharge time
tRP
35
–
40
–
50
–
ns
RAS pulse width
tRAS
50
10.000 60
10.000 70
10.000 ns
RAS pulse width (fast
tRASP
50
100.000 60
100.000 70
100.000 ns
page mode)
RAS hold time
tRSH
15
–
15
–
20
–
ns
CAS hold time
tCSH
50
–
60
–
70
–
ns
RAS hold time from CAS tRHCP
30
–
35
–
45
–
ns
precharge (FPM)
CAS precharge to WE tCPWD 30
–
35
–
45
–
ns
delay time (FPM RMW)
CAS pulse width
tCAS
15
10.000 15
10.000 20
10.000 ns
RAS to CAS delay
tRCD
20
35
20
45
20
50
ns
time
11)
Semiconductor Group
39