HYB511000BJ- Datasheet, PDF (21/22 Pages) Siemens Semiconductor Group – 1 M x 1-Bit Dynamic RAM Low Power 1 M ´ 1-Bit Dynamic RAM

HYB 511000BJ/BJL-50/-60/-70
1 M × 1-DRAM
V _IH
RAS
V _IL
V _IH
CAS
V _IL
V _IH
A0-A9
V _IL
Read Cycle
WE
V _IH
V _IL
DO
VOH
(Output)
VOL
Write Cycle
V _IH
WE
V _IL
t_CSR
t_CHR
t_WRP
t_WRH
t_WRP
t_WRH
t_RAS
t_RP
t_CPT
t_RSH
t_CAS
t_ASC
t_CAH
t_RAL
Column
Address
t_RCS ^tAAt_CAC
t_ASR
Row
Address
t_RRH
t_RCH
t_WCS
t_OFF
t_CLZ
Valid Data Out
t_RWL
t_CWL
t_WCH
DI
V _IH
(Input)
V _IL
DO
V
(Output)
V
IH
IL
Read-Modify-Write Cycle
V _IH
tWRP
t_WRH
HI-Z
WE
V _IL
DI
(Input)
DO
(Output)
V _IH
V _IL
VOH
VOL
HHII--ZZ
“H” or “L”
t_DS
t_DH
Valid Data In
t_RCS
t_AA
t_AWD
t_CWD
tCAC
tCAC
t CLZ
t_CWL
t_RWL
t_WP
t_DS
t_DH
Data In
tOFF
Valid Data _Out
CAS-Before-RAS Refresh Counter Test Cycle
Semiconductor Group
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