HYB511000BJ- Datasheet, PDF (6/22 Pages) Siemens Semiconductor Group – 1 M x 1-Bit Dynamic RAM Low Power 1 M ´ 1-Bit Dynamic RAM

HYB 511000BJ/BJL-50/-60/-70
1 M × 1-DRAM
DC Characteristics (cont’d)
T_A = 0 to 70 ˚C; V_SS = 0 V; V_CC = 5 V ± 10 %
Parameter
Average V_CC supply current during RAS only
refresh cycles:
-50 version
-60 version
-70 version
Symbol Limit Values
min.
max.
I_CC3
–
90
–
80
–
70
(RAS cycling: CAS = V_IH : t_RC = t_RC min.)
Average V_CC supply current during fast page
modes:
-50 version
-60 version
-70 version
(RAS = V_IL , CAS, address cycling:
t_PC = t_PC min.)
Standby V_CC supply current
L-Version
(RAS = CAS = V_CC – 0.2 V)
Average V_CC supply current during
CAS-before-RAS refresh mode:
-50 version
-60 version
-70 version
(RAS, CAS, address cycling: t_RC = t_RC min.)
For L-version only:
Battery backup current:
average power supply current, battery backup
mode:
(CAS = CAS before RAS cycling or 0.2 V,
WE = V_CC – 0.2 V or 0.2 V,
A0 to A9 = V_CC – 0.2 V or 0.2 V,
DI = V_CC – 0.2 V or 0.2 V open,
t_RC = 125 µs, t_RAS = t_RAS min. ~ 1 µs)
Input leakage current (only TF)
(0 V ≤ V_IN (TF) ≤ V_CC + 0.5 V)
All other pins not under test = 0 V
Test function input current
(V_CC + 4.5 ≤ V_IN (TF) ≤ 10.5 V)
I_CC4
I_CC5
I_CC6
I_CC7
I_ITF(L)
I_TF
–
–
–
–
–
–
–
–
–
– 10
–
70
60
50
1
200
90
80
70
300
+ 10
1
Unit Test
Condition
mA ²⁾
mA ²⁾
mA ²⁾
mA ^{2) 3)}
mA ^{2) 3)}
mA ^{2) 3)}
mA ¹⁾
µA ¹⁾
mA ²⁾
mA ²⁾
mA ²⁾
µA ²⁾
µA ¹⁾
mA ¹⁾
Semiconductor Group
38