HYB39S13620TQ- Datasheet, PDF (5/70 Pages) Siemens Semiconductor Group – Special Mode Registers Two color registers Burst Read with Single Write Operation

HYB 39S16320TQ-6/-7/-8
Signal Pin Description
Pin
Type Signal Polarity Function
CLK
Input Pulse Positive The system clock input. All of the SGRAM inputs are
Edge sampled on the rising edge of the clock.
CKE
Input Level Active
High
Activates the CLK signal when high and deactivates the
CLK signal when low. By deactivating the clock, CKE low
initiates the Power Down mode, Suspend mode, or the Self
Refresh mode.
CS
Input Pulse Active CS enables the command decoder when low and disables
Low
the command decoder when high. When the command
decoder is disabled, new commands are ignored but
previous operations continue.
RAS
CAS
WE
Input Pulse Active
Low
When sampled at the positive rising edge of the clock,
CAS, RAS, and WE define the operation to be executed by
the SGRAM.
A0 - A9 Input Level –
During a Bank Activate command cycle, A0-A9 defines the
row address (RA0-RA9) when sampled at the rising clock
edge.
During a Read or Write command cycle, A0-A7 defines the
column address (CA0-CA7) when sampled at the rising
clock edge.
In addition to the column address, CA8 is used to invoke
autoprecharge operation at the end of the burst read or
write cycle. If A8 is high, autoprecharge is selected and BA
defines the bank to be precharged (low = bank A,
high bank B). If A8 is low, autoprecharge is disabled.
During a Precharge command cycle, A8 is used in
conjunction with BA to control which bank(s) to precharge.
If A8 is high, both bank A and bank B will be precharged
regardless of the state of BA. If A8 is low, then BA is used
to define which bank to precharge.
BA
Input Level –
Selects which bank is activated. BA low selects bank A and
BA high selects bank B.
DQ0 -
DQ31
Input Level –
Output
Data Input/Output pins operate in the same manner as on
conventional DRAMs, with the exception of the Block Write
function. In this case, the DQx pins perform a masking
operation.
Semiconductor Group
5
1998-10-01