SDA9288X Datasheet, PDF (28/46 Pages) Siemens Semiconductor Group – Single Chip PIP System

SDA 9288X
3.2 Operational Range (cont’d)
Parameter
Symbol
Limit Values
Unit Remark
min. typ. max.
Inset Vertical Sync TTL and 3-L Inputs: VPD/VI, HVI¹⁾
Signal medium
17
µs
or high time
Signal low time
200
ns
Necessary for vertical
sync detection
Parent Horizontal Sync TTL Inputs: HP/SCP, HPD/SCI²⁾
Sync frequency
in single frequency
display mode
Sync frequency
in double frequency
display mode
Signal rise time
Signal high time
Signal low time
14.53
15
29.06
30
100
900
16.72 kHz Quartz frequency
20.480 MHz
17.19 kHz Quartz frequency
21.090 MHz
33.44 kHz Quartz frequency
20.480 MHz
34.375 kHz Quartz frequency
21.090 MHz
100 ns Noisefree transition
ns
ns
Parent Vertical Sync TTL Input VDP/VI²⁾
Signal HIGH time
200
ns
Signal LOW time
200
ns
1)
2)
All
All
values
values
are
are
referred
referred
to
to
the
the
corresponding
corresponding
min
min
(V_IH), max (V_IM) and
(V_IH) and max (V_IL)
max
(V_IL)
Semiconductor Group
28
03.96