SDA9254-2 Datasheet, PDF (20/32 Pages) Siemens Semiconductor Group – 2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM) with On-chip Noise Reduction Filter

SDA 9254-2
Operation Truth Table
SCAD
RE Cycle N
SAR
SAC
RA0…RA
7
RA0…RA
7
CA0…CA
5
CA0…CA
5
Mode
M0 M1
L
L
HL
RE Cycle N + n, n = 1, 2, 3 …
OEA OEDLO SCA SCB RA RB WT Operation
X
X
XX
X X Read transfer from
memory to shifter A
X
X
XXX
X Read transfer from
memory to shifter B
RA0…RA CA0…CA L H X
X
XXXX
7
5
Write transfer from
shifter C to memory
X
X
X
X
HHX
X
X X X X X Refresh with
internal row
address
X
XXL
X
X X X X Serial read port A
X
X
X
XXX
L
X
X X X Data output DLO
X
X
X
XXX
X
X
X X X Serial read port C
Note: X = Don’t care
Row address, column address and mode bits have to be
defined in RE cycle N in order to become effective in RE
cycle N + 1
Semiconductor Group
20
1998-01-16