SDA9254-2 Datasheet, PDF (12/32 Pages) Siemens Semiconductor Group – 2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM) with On-chip Noise Reduction Filter

SDA 9254-2
Pin Definitions and Functions
Pin No. Symbol
15
SQA11
.
.
.
.
18
SQA8
21
SQA7
22
SQA6
27
SQA5
28
SQA4
31
SQA3
32
.
33
.
34
SQA0
51
SCA
58
RA
26
OEA
62
SCB
59
RB
23
OEDLO
4
SDC11
.
.
.
.
1
SDC8
64
SDC7
63
SDC6
50
SDC5
49
SDC4
48
SDC3
47
SDC2
46
SDC1
45
SDC0
60
WT
52
SAR
53
SAC
54
SCAD
55
RE
5
CLASS0
6
CLASS1
Input (I)
Output (O)
O
.
.
.
.
.
.
O
O
.
.
O
I
I
I
I
I
I
I
.
.
.
.
.
.
I
I
I
I
I
I
I
I
I
I
I
I
Function
Serial data output port A (luminance signal)
Serial data output port A (chrominance signal)
Serial clock input for port A
Read transfer control input (latch A to shift register A)
Output enable input for port A
Serial clock input for port B and C
Read transfer control input (latch B to shift register B)
Output enable input for delay line output
Serial data input port C (luminance signal)
Serial data input port C (chrominance signal)
Write transfer control input (shift register C to latch C)
Serial row address input
Serial column address and mode control input
Serial address clock input
RAM-enable input (also latches the addresses)
Characteristic of the noise reduction filter
Semiconductor Group
12
1998-01-16