SDA9254-2 Datasheet, PDF (1/32 Pages) Siemens Semiconductor Group – 2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM) with On-chip Noise Reduction Filter

2.6 MBit Dynamic Sequential Access Memory
for Television Applications (TV-SAM) with
On-chip Noise Reduction Filter
SDA 9254-2
Preliminary Data
CMOS IC
Features
q Stores a complete video field (4:1:1)
q On chip adaptive recursive noise reduction filter (4:1:1)
q 4 noise reduction classes selectable
q Special noise reduction mode for 4:2:2 applications
q 212 × 64 × 16 × 12-bit organization
q Triple port architecture
q One 16 × 12-bit input shift register
q Two 16 × 12-bit output shift registers
q Shift registers independently and simultaneously
accessible (one output shift register is used internally for
noise reduction filtering)
q Continuous data flow even at maximum speed
q 40-MHz shift rate - 0.96-Gbit/s total data rate
q All inputs and outputs TTL-compatible
q Tristate outputs
q Random access of groups of 16 × 12 bits for a wide range
of applications
q Refresh-free operation possible
q 5 V ± 10 % power supply
q 0 … 70 °C operating temperature range
q Low power dissipation: 700 mW active, 28 mW standby
q Suitable for all common TV standards
q Allows flicker and noise reduction simultaneously
with only one field memory
q Applications: TV, VCR, image processing,
video printers, data compressors, delay lines,
time base correctors, HDTV
P-MQFP-64-1
Type
SDA 9254-2
Ordering Code
on request
Semiconductor Group
1
Package
P-MQFP-64-1
1998-01-16