GS2972 Datasheet, PDF (16/125 Pages) Semtech Corporation – 3G/HD/SD-SDI Serializer with Complete SMPTE Audio & Video Support

Table 1-1: Pin Descriptions (Continued)
Pin
Number
Name
Timing
Type
G6
SMPTE_BYPASS
Input
G7
IOPROC_EN/DIS
Input
G8
RESET
Input
H3
ANC_BLANK
Input
H4
LOCKED
Output
Description
CONTROL SIGNAL INPUT.
Please refer to the Input Logic parameters in the DC Electrical
Characteristics table for logic level threshold and compatibility.
Used to enable / disable all forms of encoding / decoding,
scrambling and EDH insertion.
When set LOW, the device operates in data through mode
(DVB_ASI= LOW), or in DVB-ASI mode (DVB_ASI = HIGH).
No SMPTE scrambling takes place and none of the I/O processing
features of the device are available when SMPTE_BYPASS is set
LOW.
When set HIGH, the device carries out SMPTE scrambling and I/O
processing.
CONTROL SIGNAL INPUT.
Please refer to the Input Logic parameters in the DC Electrical
Characteristics table for logic level threshold and compatibility.
Used to enable or disable the I/O processing features.
When IOPROC_EN/DIS is HIGH, the I/O processing features of the
device are enabled. When IOPROC_EN/DIS is LOW, the I/O processing
features of the device are disabled.
Only applicable in SMPTE mode.
CONTROL SIGNAL INPUT.
Please refer to the Input Logic parameters in the DC Electrical
Characteristics table for logic level threshold and compatibility.
Used to reset the internal operating conditions to default settings
and to reset the JTAG sequence.
Normal mode (JTAG/HOST = LOW).
When LOW, all functional blocks will be set to default conditions
and all input and output signals become high impedance.
When HIGH, normal operation of the device resumes.
JTAG test mode (JTAG/HOST = HIGH).
When LOW, all functional blocks will be set to default and the JTAG
test sequence will be reset.
When HIGH, normal operation of the JTAG test sequence resumes.
CONTROL SIGNAL INPUT.
Please refer to the Input Logic parameters in the DC Electrical
Characteristics table for logic level threshold and compatibility.
When ANC_BLANK is LOW, the Luma and Chroma input data is set
to the appropriate blanking levels during the H and V blanking
intervals.
When ANC_BLANK is HIGH, the Luma and Chroma data pass
through the device unaltered.
Only applicable in SMPTE mode.
STATUS SIGNAL OUTPUT.
Please refer to the Output Logic parameters in the DC Electrical
Characteristics table for logic level threshold and compatibility.
PLL lock indication.
HIGH indicates PLL is locked.
LOW indicates PLL is not locked.
GS2972 3G/HD/SD-SDI Serializer with Complete
SMPTE Audio & Video Support
Final Data Sheet Rev. 9
GENDOC-047479 September 2013
www.semtech.com
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