LC875CC8A Datasheet, PDF (28/29 Pages) Sanyo Semicon Device – ROM 128K/112K byte, RAM 4096 byte on-chip 8-bit 1-chip Microcontroller

LC875CC8A/B2A
VDD
RRES
Note :
Select CRES and RRES value to assure that at least
RES
200µs reset time is generated after the VDD becomes
CRES
higher than the minimum operating voltage.
Figure 5 Reset Circuit
SIOCLK:
DATAIN:
DATAOUT:
SIOCLK:
DATAIN:
DATAOUT:
SIOCLK:
DATAIN:
DATAOUT:
DI0 DI1
DI2
DI3
DI4
DI5
DI6
DI7
DI8
DO0 DO1 DO2 DO3 DO4 DO5 DO6
DO7
DO8
tSCKL
tSCK
tSCKH
Data RAM transmission period
(only SIO0,2)
tsDI
thDI
tdDO
tSCKL
tsDI
tdDO
Data RAM transmission period
(only SIO0,2)
tSCKHA
thDI
Figure 6 Serial I/O Waveforms
tPIL
tPIH
Figure 7 Pulse Input Timing Condition
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