LC875CC8A Datasheet, PDF (20/29 Pages) Sanyo Semicon Device – ROM 128K/112K byte, RAM 4096 byte on-chip 8-bit 1-chip Microcontroller

LC875CC8A/B2A
3. SIO2 Serial I/O Characteristics (Note 4-3-1)
Parameter
Frequency
Low level
pulse width
High level
pulse width
Frequency
Low level
pulse width
High level
pulse width
Data setup time
Data hold time
Symbol
tSCK(5)
tSCKL(5)
Pins/
Remarks
SCK2
(SI2P2)
Conditions
• See Fig. 6.
tSCKH(5)
tSCKHA(5a)
tSCKHA(5b)
tSCK(6)
tSCKL(6)
tSCKH(6)
SCK2
(SI2P2),
SCK2O
(SI2P3)
• Continuous data transmission/
reception mode of SIO0 is not
in use simultaneous.
• See Fig. 6.
• (Note 4-3-2)
• Continuous data transmission/
reception mode of SIO0 is in
use simultaneous.
• See Fig. 6.
• (Note 4-3-2)
• CMOS output selected.
• See Fig. 6.
tSCKHA(6a)
tSCKHA(6b)
tsDI(3)
thDI(3)
SI2(SI2P1),
SB2(SI2P1)
• Continuous data transmission/
reception mode of SIO0 is not
in use simultaneous.
• CMOS output selected.
• See Fig. 6.
• Continuous data transmission/
reception mode of SIO0 is in
use simultaneous.
• CMOS output selected.
• See Fig. 6.
• Must be specified with respect
to rising edge of SIOCLK
• See fig. 6.
VDD[V]
Specification
min
typ
max
2
1
1
2.2 to 5.5
4
7
4/3
1/2
1/2
2.2 to 5.5 tSCKH(6)
+(5/3)tCYC
tSCKH(6)
+ (10/3)tCYC
tSCKH(6)
+(5/3)tCYC
tSCKH(6)
+ (19/3)tCYC
0.03
2.2 to 5.5
0.03
unit
tCYC
tSCK
tCYC
Output delay time tdD0(5)
SO2(SI2P0), • Must be specified with respect
μs
SB2(SI2P1) to falling edge of SIOCLK
• Must be specified as the time
to the beginning of output state
change in open drain output
2.2 to 5.5
(1/3)tCYC
+0.05
mode.
• See Fig. 6.
Note 4-3-1: These specifications are theoretical values. Add margin depending on its use.
Note 4-3-2: To use serial-clock-input , a time from SI2RUN being set when serial clock is "H" to the first negative edge
of the serial clock must be longer than tSCKHA.
No.A0744-20/29