LC875CC8A Datasheet, PDF (26/29 Pages) Sanyo Semicon Device – ROM 128K/112K byte, RAM 4096 byte on-chip 8-bit 1-chip Microcontroller

LC875CC8A/B2A
Characteristics of a Sample Main System Clock Oscillation Circuit
Given below are the characteristics of a sample main system clock oscillation circuit that are measured using a
SANYO-designated oscillation characteristics evaluation board and external components with circuit constant values
with which the oscillator vendor confirmed normal and stable oscillation.
Table 1. Characteristics of a Sample Main System Clock Oscillator Circuit with a Ceramic Oscillator
Nominal
Frequency
Vendor
Name
Oscillator Name
Circuit Constant
Operating
Voltage
Oscillation
Stabilization Time
C1
C2
Rf1
Rd1
Range
typ
max
[pF]
[pF]
[Ω]
[Ω]
[V]
[ms]
[ms]
Remarks
12MHz
CSTCE12M0G52-R0 (10)
(10) OPEN 470 2.8 to 5.5 0.05
0.15
Internal C1, C2
8MHz
CSTCE8M00G52-R0 (10)
MURATA CSTLS8M00G53-B0
(15)
(10) OPEN 2.2k 2.7 to 5.5 0.05
(15) OPEN 680 2.5 to 5.5 0.05
0.15
Internal C1, C2
0.15
Internal C1, C2
4MHz
CSTCR4M00G53-R0 (15)
CSTLS4M00G53-R0
(15)
(15) OPEN 3.3k 2.2 to 5.5 0.05
(15) OPEN 3.3k 2.2 to 5.5 0.05
0.15
Internal C1, C2
0.15
Internal C1, C2
The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized after VDD
goes above the operating voltage lower limit (see Fig 4).
Characteristics of a Sample Subsystem Clock Oscillator Circuit
Given below are the characteristics of a sample subsystem clock oscillation circuit that are measured using a SANYO-
designated oscillation characteristics evaluation board and external components with circuit constant values with which
the oscillator vendor confirmed normal and stable oscillation.
Table 2. Characteristics of a Sample Subsystem Clock Oscillator Circuit with a Crystal Oscillator
Circuit Constant
Nominal
Oscillator
Vendor Name
Frequency
Name
C3
C4
Rf2
Rd2
Operating
Voltage
Range
Oscillation
Stabilization Time
typ
max
Remarks
[pF]
[pF]
[Ω]
[Ω]
[V]
[s]
[s]
32.768kHz SEIKO EPSON MC-306
18
18 OPEN 560k
2.2 to 5.5
Applicatable CL
1.3
3.0
Value=12.5pF
The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized after the
instruction for starting the subclock oscillation circuit is executed and to the time interval that is required for the
oscillation to get stabilized after the HOLD mode is reset (see Fig 4).
Note: The components that are involved in oscillation should be placed as close to the IC and to one another as possible
because they are vulnerable to the influences of the circuit pattern.
CF1
CF2
Rf1
Rd1
C1
C2
CF
Figure 1 Ceramic oscillation circuit
XT1
XT2
Rf2
Rd2
C3
C4
X’tal
Figure 2 Crystal oscillation circuit
0.5VDD
Figure 3 AC timing point
No.A0744-26/29