K4R271669F Datasheet, PDF (5/20 Pages) Samsung semiconductor – 128Mbit RDRAM(F-die)

K4R271669F
Direct RDRAM^™
Table 2: Pin Description
Signal
SIO1,SIO0
I/O Type
I/O CMOS^a
CMD
I
CMOS^a
SCK
V_DD
V_DDa
V_CMOS
GND
GNDa
DQA7..DQA0
I
CMOS^a
I/O RSL^b
CFM
I
RSL^b
CFMN
V_REF
CTMN
I
RSL^b
I
RSL^b
CTM
I
RSL^b
RQ7..RQ5 or
ROW2..ROW0
I
RSL^b
RQ4..RQ0 or
COL4..COL0
I
RSL^b
DQB7..
DQB0
I/O RSL^b
NC
Total pin count per package
# Pins
center
2
1
1
6
1
2
9
1
8
1
1
1
1
1
3
5
8
2
54
Description
Serial input/output. Pins for reading from and writing to the control regis-
ters using a serial access protocol. Also used for power management.
Command input. Pins used in conjunction with SIO0 and SIO1 for reading
from and writing to the control registers. Also used for power manage-
ment.
Serial clock input. Clock source used for reading from and writing to the
control registers
Supply voltage for the RDRAM core and interface logic.
Supply voltage for the RDRAM analog circuitry.
Supply voltage for CMOS input/output pins.
Ground reference for RDRAM core and interface.
Ground reference for RDRAM analog circuitry.
Data byte A. Eight pins which carry a byte of read or write data between
the Channel and the RDRAM device.
Clock from master. Interface clock used for receiving RSL signals from
the Channel. Positive polarity.
Clock from master. Interface clock used for receiving RSL signals from
the Channel. Negative polarity
Logic threshold reference voltage for RSL signals
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Negative polarity.
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Positive polarity.
Row access control. Three pins containing control and address informa-
tion for row accesses.
Column access control. Five pins containing control and address informa-
tion for column accesses.
Data byte B.Eight pins which carry a byte of read or write data between
the Channel and the RDRAM device.
No Connection.
a. All CMOS signals are high-true; a high voltage is a logic one and a low voltage is logic zero.
b. All RSL signals are low-true; a low voltage is a logic one and a high voltage is logic zero.
Page 3
Version 1.41 Jan. 2004