S6A0092 Datasheet, PDF (28/54 Pages) Samsung semiconductor – 80 SEG / 26 COM DRIVER & CONTROLLER FOR STN LCD

S6A0092
26 COM / 80 SEG DRIVER & CONTROLLER FOR STN LCD
LINE SHIFT MODE
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
0
0
1
1
0
LS2
LS1
Line Shift Mode instruction field selects the DD RAM to be displayed in first line.
LS2, LS1 = 00: DDRAM line 1 shows at the first line of LCD (default).
01: DDRAM line 2 shows at the first line of LCD.
10: DDRAM line 3 shows at the first line of LCD.
11: DDRAM line 4 shows at the first line of LCD.
LCD
DD RAM Line1 (00h~0Fh)
DD RAM Line2 (10h~1Fh)
DD RAM Line3 (20h~2Fh)
LCD
DD RAM Line2 (10h~1Fh)
DD RAM Line3 (20h~2Fh)
DD RAM Line4 (30h~3Fh)
LCD
DD RAM Line3 (20h~2Fh)
DD RAM Line4 (30h~3Fh)
DD RAM Line1 (00h~0Fh)
LCD
DD RAM Line4 (30h~3Fh)
DD RAM Line1 (00h~0Fh)
DD RAM Line2 (10h~1Fh)
DD RAM Line4 (30h~3Fh)
LS2, LS1 = 00
DD RAM Line1 (00h~0Fh)
LS2, LS1 = 01
DD RAM Line2 (10h~1Fh)
LS2, LS1 = 10
DD RAM Line3 (20h~2Fh)
LS2, LS1 = 11
Figure 15. Line Shift Mode Display at 3-line LCD
LCD
DD RAM Line1 (00h~0Fh)
DD RAM Line2 (10h~1Fh)
LCD
DD RAM Line2 (10h~1Fh)
DD RAM Line3 (20h~2Fh)
LCD
DD RAM Line3 (20h~2Fh)
DD RAM Line4 (30h~3Fh)
LCD
DD RAM Line4 (30h~3Fh)
DD RAM Line1 (00h~0Fh)
DD RAM Line3 (20h~2Fh)
DD RAM Line4 (30h~3Fh)
LS2, LS1 = 00
DD RAM Line4 (30h~3Fh)
DD RAM Line1 (00h~0Fh)
LS2, LS1 = 01
DD RAM Line1 (00h~0Fh)
DD RAM Line2 (10h~1Fh)
LS2, LS1 = 10
DD RAM Line2 (10h~1Fh)
DD RAM Line3 (20h~2Fh)
LS2, LS1 = 11
Figure 16. Line Shift Mode Display at 2-line LCD
BIAS CONTROL
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
0
0
1
1
1
-
BS
Bias Control instruction field sets LCD bias voltages generated internally. This bit is used when the internal voltage
follower is ON.
BS = 0: 1/5 bias (default)
1: 1/4 bias (V2 = V3)
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