S6B0755 Datasheet, PDF (23/68 Pages) Samsung semiconductor – 128 SEG / 65 COM DRIVER & CONTROLLER FOR STN LCD

128 SEG / 65 COM DRIVER & CONTROLLER FOR STN LCD
PRELIMINARY SPEC. VER. 1.0
S6B0755
LCD DISPLAY CIRCUITS
Oscillator
This is completely on-chip Oscillator and its frequency is nearly independent of VDD. This Oscillator signal is used
in the voltage converter and display timing generation circuit.
Display Timing Generator Circuit
This circuit generates some signals to be used for displaying LCD. The display clock, CL(internal), generated by
oscillation clock, generates the clock for the line counter and the signal for the display data latch. The line address
of on-chip RAM is generated in synchronization with the display clock and the display data latch circuit latches
the 128-bit display data in synchronization with the display clock. The display data, which is read to the LCD
driver, is completely independent of the access to the display data RAM from the microprocessor. The display
clock generates an LCD AC signal (M) which enables the LCD driver to make a AC drive waveform, and also
generates an internal common timing signal and start signal to the common driver. The frame signal or the line
signal changes the M by setting internal instruction. Driving waveform and internal timing signal are shown in
Figure 11.
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