S6B0755 Datasheet, PDF (18/68 Pages) Samsung semiconductor – 128 SEG / 65 COM DRIVER & CONTROLLER FOR STN LCD

S6B0755
PRELIMINARY SPEC. VER. 1.0
128 SEG / 65 COM DRIVER & CONTROLLER FOR STN LCD
Data Transfer
The S6B0755 uses bus holder and internal data bus for Data Transfer with the MPU. When writing data from the
MPU to on-chip RAM, data is automatically transferred from the bus holder to the RAM as shown in Figure 5. And
when reading data from on-chip RAM to the MPU, the data for the initial read cycle is stored in the bus holder
(dummy read) and the MPU reads this stored data from bus holder for the next data read cycle as shown in Figure
6. This means that a dummy read cycle must be inserted between each pair of address sets when a sequence of
address sets is executed. Therefore, the data of the specified address cannot be output with the read display data
instruction right after the address sets, but can be output at the second read of data.
MPU signals
RS
/W R
DB0 to DB7
N
Internal signals
/W R
BUS HOLDER
N
COLUMN ADDRESS
D(N)
D(N+1)
D(N+2)
D(N+3)
D(N)
N
D(N+1)
N+1
D(N+2)
N+2
D(N+3)
N+3
MPU signals
RS
/W R
/RD
DB0 to DB7
Internal signals
/W R
/RD
BUS HOLDER
COLUMN ADDRESS
Figure 5. Write Timing
N
Dummy
D(N)
D(N+1)
N
N
D(N)
N+1
D(N+1)
N+2
Figure 6. Read Timing
D(N+2)
N+3
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