S6B0755 Datasheet, PDF (15/68 Pages) Samsung semiconductor – 128 SEG / 65 COM DRIVER & CONTROLLER FOR STN LCD

128 SEG / 65 COM DRIVER & CONTROLLER FOR STN LCD
PRELIMINARY SPEC. VER. 1.0
S6B0755
FUNCTIONAL DESCRIPTION
MICROPROCESSOR INTERFACE
Chip Select Input
There are CS1B for chip selection. The S6B0755 can interface with an MPU only when CS1B is "L" . When these
pins are set to any other combination, RS, E_RD, and RW_WR inputs are disabled and DB0 to DB7 are to be
high impedance. And, in case of serial interface, the internal shift register and the counter are reset.
Parallel / Serial Interface
S6B0755 has four types of interface with an MPU, which are two serial and two parallel interface. This parallel or
serial interface is determined by PS 0pin as shown in Table 6.
Table 6. Parallel / Serial Interface Mode
PS0
Type
CS1B
PS1
H
H
Parallel
CS1B
L
H
L
Serial
CS1B
L
Interface mode
6800-series MPU mode
8080-series MPU mode
4 Pin-SPI MPU mode
3 Pin-SPI MPU mode
Parallel Interface (PS0 = "H")
The 8-bit bi-directional data bus is used in parallel interface and the type of MPU is selected by PS1 as shown in
Table 7. The type of data transfer is determined by signals at RS, E_RD and RW_WR as shown in Table 8.
Table 7. Microprocessor Selection for Parallel Interface
PS1
CS1B
RS
E_RD RW_WR DB0 to DB7
H
CS1B
RS
E
RW
DB0 to DB7
L
CS1B
RS
/RD
/WR
DB0 to DB7
MPU bus
6800-series
8080-series
Table 8. Parallel Data Transfer
Common
RS
H
H
L
L
6800-series
E_RD
(E)
RW_WR
(RW)
H
H
H
L
H
H
H
L
8080-series
E_RD
(/RD)
RW_WR
(/WR)
L
H
H
L
L
H
H
L
Description
Display data read out
Display data write
Register status read
Writes to internal register (instruction)
NOTE: When E_RD pin is always pulled high for 6800-series interface, it can be used CSB for enable signal. In
this case, interface data is latched at the rising edge of CSB and the type of data transfer is determined by
signals at RS, RW_WR as in case of 6800-series mode.
12