K4S160822D Datasheet, PDF(21/46 Page) Samsung semiconductor – 2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL

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K4S160822D Datasheet, PDF (21/46 Pages) Samsung semiconductor – 2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL

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K4S160822D

( Continued )

(b) CL=3, BL=4

CLK

i) CMD

DQM

ii) CMD

DQM

iii) CMD

DQM

iii) CMD

DQM

iv) CMD

DQM

RD WR

D0 D1 D2 D3

Hi-Z D0

Hi-Z

Note 1

CMOS SDRAM

5. Write Interrupted by Precharge & DQM

CLK

CMD

DQM

Note 3

PRE

Note 2

D0 D1 D2 D3

Masked by DQM

*Note : 1. To prevent bus contention, DQM should be issued which makes at least one gap between data in and data out.

2. To inhibit invalid write, DQM should be issued.

3. This precharge command and burst write command should be of the same bank, otherwise it is not precharge

interrupt but only the other bank precharge of dual banks operation.

- 21

Rev. 1.0 (Oct. 1999)

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