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M378T3354BG3-CD5 Datasheet, PDF (2/22 Pages) Samsung semiconductor – 240pin Unbuffered Module based on 512Mb B-die 64/72-bit Non-ECC/ECC
256MB, 512MB, 1GB Unbuffered DIMMs
DDR2 Unbuffered DIMM Ordering Information
Part Number
Density
Organization
Component Composition
x64 Non ECC
M378T3354BG(Z)3-CD5/CC
256MB
32Mx64
32Mx16(K4T51163QB)*4
M378T3354BG(Z)0-CD5/CC
256MB
32Mx64
32Mx16(K4T51163QB)*4
M378T6553BG(Z)3-CD5/CC
512MB
64Mx64
64Mx8(K4T51083QB)*8
M378T6553BG(Z)0-CD5/CC
512MB
64Mx64
64Mx8(K4T51083QB)*8
M378T2953BG(Z)3-CD5/CC
1GB
128Mx64
64Mx8(K4T51083QB)*16
M378T2953BG(Z)0-CD5/CC
1GB
128Mx64
64Mx8(K4T51083QB)*16
x72 ECC
M391T6553BG(Z)3-CD5/CC
512MB
64Mx72
64Mx8(K4T51083QB)*9
M391T6553BG(Z)0-CD5/CC
512MB
64Mx72
64Mx8(K4T51083QB)*9
M391T2953BG(Z)3-CD5/CC
1GB
128Mx72
64Mx8(K4T51083QB)*18
M391T2953BG(Z)0-CD5/CC
1GB
128Mx72
64Mx8(K4T51083QB)*18
Note: “Z” of Part number(11th digit) stand for Lead-free products.
Note: “3” of Part number(12th digit) stand for Dummy Pad PCB products.
Features
• Performance range
D5(DDR2-533)
CC(DDR2-400)
Unit
Speed@CL3
400
400
Mbps
Speed@CL4
533
400
Mbps
Speed@CL5
-
-
Mbps
CL-tRCD-tRP
4-4-4
3-3-3
CK
• JEDEC standard 1.8V ± 0.1V Power Supply
• VDDQ = 1.8V ± 0.1V
• 200 MHz fCK for 400Mb/sec/pin, 267MHz fCK for 533Mb/sec/pin
• 4 Banks
• Posted CAS
• Programmable CAS Latency: 3, 4, 5
• Programmable Additive Latency: 0, 1 , 2 , 3 and 4
• Write Latency(WL) = Read Latency(RL) -1
• Burst Length: 4 , 8(Interleave/nibble sequential)
• Programmable Sequential / Interleave Burst Mode
• Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)
• Off-Chip Driver(OCD) Impedance Adjustment
• On Die Termination
• Average Refresh Period 7.8us at lower than a TCASE 85°C, 3.9us at 85°C < TCASE < 95 °C
- support High Temperature Self-Refresh rate enable feature
• Package: 60ball FBGA - 64Mx8 , 84ball FBGA - 32Mx16
• All of Lead-free products are compliant for RoHS
Note: For detailed DDR2 SDRAM operation, please refer to Samsung’s Device operation & Timing diagram.
DDR2 SDRAM
Number of Rank
Height
1
30mm
1
30mm
1
30mm
1
30mm
2
30mm
2
30mm
1
30mm
1
30mm
2
30mm
2
30mm
Address Configuration
Organization
64Mx8(512Mb) based Module
32Mx16(512Mb) based Module
Row Address
A0-A13
A0-A12
Column Address
A0-A9
A0-A9
Bank Address
BA0-BA1
BA0-BA1
Auto Precharge
A10
A10
Rev. 1.5 Aug. 2005