K4D263238D Datasheet, PDF (17/18 Pages) Samsung semiconductor – 1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL

K4D263238D
Simplified Timing(2) @ BL=4, CL=3
128M DDR SDRAM
0
1
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CK, CK
BA[1:0] _BAa
BAa
BAa
BAa
BAb BAa
BAb
A8/AP Ra
ADDR
(A0~A7, _Ra
Ca
A9~,A11)
WE
Ra
Rb
Ra
Rb Ca
Cb
DQS
DQ
Da0 Da1 Da2 Da3
DM
Da0 Da1 Da2 Da3 Db0 Db1 Db2 Db3
COMMANDACTIVEA
WRITEA
tRCD
tRAS
tRC
Normal Write Burst
(@ BL=4)
PRECH
ACTIVEA
ACTIVEB WRITEA
WRITEB
tRP
tRRD
Multi Bank Interleaving Write Burst
(@ BL=4)
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Rev. 1.3 (Jul. 2002)