M16C30_02 Datasheet, PDF (99/178 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Serial I/O
Mitsubishi microcomputers
M16C / 30 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
UARTi transmit/receive mode register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
UiMR(i=0,1)
Address
When reset
03A016, 03A816
0016
Bit
symbol
Bit name
Function
(During clock synchronous
serial I/O mode)
Function
(During UART mode)
RW
SMD0 _{Serial I/O mode select bit}
SMD1
SMD2
Must always be “001”
b2 b1 b0
0 0 0 : Serial I/O invalid
0 1 0 : Must not be set.
0 1 1 : Must not be set.
1 1 1 : Must not be set.
b2 b1 b0
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
0 0 0 : Serial I/O invalid
0 1 0 : Must not be set.
0 1 1 : Must not be set.
1 1 1 : Must not be set.
CKDIR Internal/external clock
select bit
0 : Internal clock
1 : External clock (Note)
0 : Internal clock
1 : External clock (Note)
STPS _{Stop bit length select bit Invalid}
0 : One stop bit
1 : Two stop bits
PRY Odd/even parity select bit Invalid
PRYE _{Parity enable bit}
SLEP Sleep select bit
Invalid
Must always be “0”
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
0 : Sleep mode deselected
1 : Sleep mode selected
Note : Set the corresponding port direction register to “0”.
UART2 transmit/receive mode register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
U2MR
Address
037816
When reset
0016
Bit
symbol
Bit name
Function
(During clock synchronous
serial I/O mode)
SMD0 _{Serial I/O mode select bit}
SMD1
SMD2
Must always be “001”
b2 b1 b0
0 0 0 : Serial I/O invalid
0 1 0 : (Note 1)
0 1 1 : Must not be set.
1 1 1 : Must not be set.
Function
(During UART mode)
RW
b2 b1 b0
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
0 0 0 : Serial I/O invalid
0 1 0 : Must not be set.
0 1 1 : Must not be set.
1 1 1 : Must not be set.
CKDIR Internal/external clock
select bit
0 : Internal clock
Must always be “0”
1 : External clock (Note 2)
STPS _{Stop bit length select bit Invalid}
0 : One stop bit
1 : Two stop bits
PRY Odd/even parity select bit Invalid
PRYE _{Parity enable bit}
IOPOL ^{TxD, RxD I/O polarity}
reverse bit
Invalid
0 : No reverse
1 : Reverse
Usually set to “0”
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
0 : No reverse
1 : Reverse
Usually set to “0”
Note 1: Bit 2 to bit 0 are set to “0102” when I²C mode is used.
Note 2: Set the corresponding port direction register to “0”.
Figure 1.16.5. Serial I/O-related registers (2)
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