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M16C30_02 Datasheet, PDF (40/178 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Wait Mode
Mitsubishi microcomputers
M16C / 30 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Wait Mode
When a WAIT instruction is executed, the BCLK stops and the microcomputer enters the wait mode. In this
mode, oscillation continues but the BCLK and watchdog timer stop. Writing “1” to the WAIT peripheral
function clock stop bit and executing a WAIT instruction stops the clock being supplied to the internal
peripheral functions, allowing power dissipation to be reduced. However, peripheral function clock fC32
does not stop so that the peripherals using fC32 do not contribute to the power saving. When the MCU
running in low-speed or low power dissipation mode, do not enter WAIT mode with this bit set to “1”. Table
1.10.3 shows the status of the ports in wait mode.
Wait mode is cancelled by a hardware reset or an interrupt. If an interrupt is used to cancel wait mode, that
interrupt must first have been enabled, and the priority level of the interrupt which is not used to cancel must
have been changed to 0. If returning by an interrupt, the clock in which the WAIT instruction executed is set
to BCLK by the microcomputer, and the action is resumed from the interrupt routine. If only a hardware
_______
reset or an NMI interrupt is used to cancel wait mode, change the priority level of all interrupt to 0,then shift
to wait mode.
Table 1.10.3. Port status during wait mode
Pin
Memory expansion mode
_______
_______
Address bus, data bus, CS0 to CS3,
________
BHE
_____ ______ ________ _________
RD, WR, WRL, WRH
__________
HLDA,BCLK
Microprocessor mode
Retains status before wait mode
“H”
“H”
ALE
“H”
Port
Retains status before wait mode
CLKOUT
When fC selected Valid only in single-chip mode
When f8, f32 selected Valid only in single-chip mode
Single-chip mode
Retains status before wait mode
Does not stop
Does not stop when the WAIT
peripheral function clock stop
bit is “0”.
When the WAIT peripheral
function clock stop bit is “1”,
the status immediately prior
to entering wait mode is main-
tained.
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