H8S43 Datasheet, PDF (931/1279 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 22 ROM
Table 22.16 Programmer Mode Commands
Command Name
Number
of Cycles Mode
1st Cycle
Address Data
2nd Cycle
Mode Address Data
Memory read mode 1 + n
Write X
H'00
Read RA
Dout
Auto-program mode 129
Write X
H'40
Write WA
Din
Auto-erase mode
2
Write X
H'20
Write X
H'20
Status read mode 2
Write X
H'71
Write X
H'71
Notes: 1. In auto-program mode, 129 cycles are required for command writing by a simultaneous
128-byte write.
2. In memory read mode, the number of cycles depends on the number of address write
cycles (n).
22.11.3 Memory Read Mode
(1) After completion of auto-program/auto-erase/status read operations, a transition is made to the
command wait state. When reading memory contents, a transition to memory read mode must
first be made with a command write, after which the memory contents are read.
(2) In memory read mode, command writes can be performed in the same way as in the command
wait state.
(3) Once memory read mode has been entered, consecutive reads can be performed.
(4) After powering on, memory read mode is entered.
Table 22.17 AC Characteristics in Transition to Memory Read Mode
(Conditions: V_CC = 3.3 V ±0.3 V, V_SS = 0 V, T_a = 25°C ±5°C)
Item
Command write cycle
CE hold time
CE setup time
Data hold time
Data setup time
Write pulse width
WE rise time
WE fall time
Symbol
t_nxtc
t_ceh
t_ces
t_dh
t_ds
t_wep
t_r
t_f
Min
Max
Unit
20
—
µs
0
—
ns
0
—
ns
50
—
ns
50
—
ns
70
—
ns
—
30
ns
—
30
ns
Rev. 3.00 Jan 11, 2005 page 875 of 1220
REJ09B0186-0300O