HD404369 Datasheet, PDF (92/117 Pages) Hitachi Semiconductor – 4-bit HMCS400-Series microcomputer

HD404369 Series
Notes on Usage
• Use the SEM or SEMD instruction for writing to the A/D start flag (ADSF)
• Do not write to the A/D start flag during A/D conversion
• Data in the A/D data register during A/D conversion is undefined
• Since the operation of the A/D converter is based on the clock from the system oscillator, the A/D
converter does not operate in stop, watch, or subactive mode. In addition, to save power while in these
modes, all current flowing through the converter’s resistance ladder is cut off.
• If the power supply for the A/D converter is to be different from V_CC, connect a 0.1-µF bypass capacitor
between the AV_CC and AV_SS pins. (However, this is not necessary when the AV_CC pin is directly
connected to the V_CC pin.)
• The contents of the A/D data register are not guaranteed during A/D conversion. To ensure that the A/D
converter operates stably, do not execute port output instructions during A/D conversion.
• The port data register (PDR) is initialized to 1 by an MCU reset. At this time, if pull-up MOS is selected
as active by bit 3 of the miscellaneous register (MIS3), the port will be pulled up to V_CC. When using a
shared R port/analog input pin as an input pin, clear PDR to 0. Otherwise, if pull-up MOS is selected by
MIS3 and PDR is set to 1, a pin selected by A/D mode register 1 or 2 (AMR1 or AMR2) as an analog
pin will remain pulled up (figure 78).
V_CC
V_CC
HLT
MIS3
AMR
A/D mode register value
DCR
Input control signal
PDR
CPU input
A/D input
ACR
A/D channel register value
Figure 78 R Port/Analog Multiplexed Pin Circuit
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