HD404369 Datasheet, PDF (33/117 Pages) Hitachi Semiconductor – 4-bit HMCS400-Series microcomputer


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HD404369Series
but the accuracy of the contents of the accumulator, B register, W register, X/SPX register, Y/SPY register,
carry flag, and serial data register cannot be guaranteed.
Watch Mode: In watch mode, the clock function (timer A) using the X1 and X2 oscillator operates, but
other function operations stop. Therefore, the power dissipation in this mode is the second least to stop
mode, and this mode is convenient when only clock display is used. In this mode, the OSC₁ and OSC₂
oscillator stops, but the X1 and X2 oscillator operates. The MCU enters watch mode if the STOP
instruction is executed in active mode when TMA3 = 1, or if the STOP or SBY instruction is executed in
subactive mode.
Watch mode is terminated by a RESET input or a timer-A/INT₀ interrupt request. For details of RESET
input, refer to the Stop Mode section. When terminated by a timer-A/INT₀ interrupt request, the MCU
enters active mode if LSON = 0, or subactive mode if LSON = 1. After an interrupt request is generated,
the time required to enter active mode is t_RC for a timer A interrupt, and T_X (where T + t_RC < T_X < 2T + t_RC)
for an INT₀ interrupt, as shown in figures 14 and 15.
Operation during mode transition is the same as that at standby mode cancellation (figure 12).
Oscillator
Internal
clock
Stop mode
RESET
or STOPC
STOP instruction execution
t_res
t_res ≥ t_RC (stabilization period)
Figure 13 Timing of Stop Mode Cancellation
Subactive Mode: The OSC₁ and OSC₂ oscillator stops and the MCU operates with a clock generated by
the X1 and X2 oscillator. In this mode, functions except the A/D conversion operate. However, because the
operating clock is slow, the power dissipation becomes low, next to watch mode.
The CPU instruction execution speed can be selected as 244 µs or 122 µs by setting bit 2 (SSR12) of the
system clock select register 1 (SSR1: $027). Note that the SSR12 value must be changed in active mode. If
the value is changed in subactive mode, the MCU may malfunction.
When the STOP or SBY instruction is executed in subactive mode, the MCU enters either watch or active
mode, depending on the statuses of the low speed on flag (LSON: $020, bit 0) and the direct transfer on
flag (DTON: $020, bit 3).
Interrupt Frame: In watch and subactive modes, ø_CLK is applied to timer A and the INT₀ circuit. Prescaler
W and timer A operate as the time-base and generate the timing clock for the interrupt frame. Three
interrupt frame lengths (T) can be selected by setting the miscellaneous register (MIS: $00C) (figure 15).
In watch and subactive modes, the timer-A/INT₀ interrupt is generated synchronously with the interrupt
frame. The interrupt request is generated synchronously with the interrupt strobe timing except during
transition to active mode. The falling edge of the INT₀ signal is input asynchronously with the interrupt
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