HD404369 Datasheet, PDF (10/117 Pages) Hitachi Semiconductor – 4-bit HMCS400-Series microcomputer

HD404369 Series
Memory Map
ROM Memory Map
The ROM memory map is shown in figure 1 and described below.
Vector Address Area ($0000–$000F): Reserved for JMPL instructions that branch to the start addresses
of the reset and interrupt routines. After MCU reset or an interrupt, program execution continues from the
vector address.
Zero-Page Subroutine Area ($0000–$003F): Reserved for subroutines. The program branches to a
subroutine in this area in response to the CAL instruction.
Pattern Area ($0000–$0FFF): Contains ROM data that can be referenced with the P instruction.
Program Area ($0000-$0FFF (HD404364, HD40A4364), $0000–$1FFF (HD404368, HD40A4368),
$0000–$2FFF (HD4043612, HD40A43612), $0000–$3FFF (HD404369, HD40A4369, HD407A4369)):
The entire ROM area can be used for program coding.
Note:
$0000
$000F
$0010
$003F
$0040
$0FFF
$1000
$1FFF
$2000
Vector address
(16 words)
Zero-page subroutine
(64 words)
Program
(4,096 words)
For HD404364, HD40A4364
Program
(8,192 words)
For HD404368, HD40A4368
Program
(12,288 words)
$0000
JMPL instruction
$0001 (jump to RESET, STOPC routine)
$0002
$0003
JMPL instruction
(jump to INT 0 routine)
$0004
$0005
JMPL instruction
(jump to INT ₁ routine)
$0006
$0007
JMPL instruction
(jump to timer A routine)
$0008
$0009
JMPL instruction
(jump to timer B routine)
$000A
$000B
JMPL instruction
(jump to timer C routine)
$000C
JMPL instruction
$000D (jump to A/D converter routine)
$000E
$000F
JMPL instruction
(jump to serial routine)
$2FFF
$3000
For HD4043612, HD40A43612
Program
(16,384 words)
$3FFF
For HD404369, HD40A4369,
HD407A4369
Since the ROM address areas between $0000–$0FFF overlap, the user can determine how these
areas are to be used.
Figure 1 ROM Memory Map
RAM Memory Map
The MCU contains 512-digit × 4 bit RAM areas. These RAM areas consist of a memory register area, a
data area, and a stack area. In addition, an interrupt control bits area, special function register area, and
register flag area are mapped onto the same RAM memory space labeled as a RAM-mapped register area.
The RAM memory map is shown in figure 2 and described below.
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