HD404369 Datasheet, PDF (40/117 Pages) Hitachi Semiconductor – 4-bit HMCS400-Series microcomputer

HD404369 Series
Oscillator Circuit
A block diagram of the clock generation circuit is shown in figure 22. As shown in table 20, a ceramic
oscillator or crystal oscillator can be connected to OSC₁ and OSC₂, and a 32.768-kHz oscillator can be
connected to X1 and X2. The system oscillator can also be operated by an external clock.
Registers for Oscillator Circuit Operation
System Clock Selection Register 1 (SSR1: $027): Four bit write-only register which sets the subsystem
clock frequency (f_SUB) division ratio, and sets the subsystem clock oscillation in stop mode. Bit 1 (SSR11)
of system clock select register 1 must be set according to the frequency of the oscillator connected to OSC₁
and OSC₂ (figure 23).
Bit 1 (SSR11) and bit 2 (SSR12) are initialized to 0 on reset and in stop mode. Bit 3 (SSR13) is initialized
to 0 only on reset.
LSON
OSC₂
OSC₁
X1
X2
System ^{fOSC 1/4, 1/8, fcyc}
oscillator
1/16 or
1/32 ^tcyc
division
circuit^*1
Timing
generator
circuit
f_X
f_SUB
Sub-
system
1/8 or 1/4
Timing
division ^tsubcyc generator
oscillator
circuit^*2
circuit
ø_CPU
System
clock
selection
ø_PER
TMA3
CPU with ROM,
RAM, registers,
flags, and I/O
Peripheral
function
interrupt
1/8
division
circuit
Timing
f_W generator
circuit
t_Wcyc
Time-base
clock øCLK
selection
Time-base
interrupt
Notes: 1. 1/4, 1/8, 1/16 or 1/32 division ratio can be selected by setting bits 0 and 1 of system clock
select register 2 (SSR2: $028).
2. 1/8 or 1/4 division ratio can be selected by setting bit 2 of system clock select register 1
(SSR1: $027).
Figure 22 Clock Generation Circuit
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