RX111_16 Datasheet, PDF (84/127 Pages) Renesas Technology Corp – 32 MHz 32-bit RX MCUs, 50 DMIPS, up to 512 Kbytes of flash memory

RX111 Group
5. Electrical Characteristics
Table 5.29 Timing of Recovery from Low Power Consumption Modes (4)
Conditions: 1.8 V ≤ VCC = VCC_USB ≤ 3.6 V, 1.8 V ≤ AVSS0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, T_a = –40 to +105°C
Item
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
Recovery time from deep
sleep mode*¹
High-speed mode*²
Middle-speed mode*³
Low-speed mode*⁴
t_DSLP
—
2
3.5
μs
t_DSLP
—
3
4
μs
t_DSLP
—
400
500
μs
Note: When the division ratios of PCLKB, PCLKD, FCLK, and ICLK are all set to 1.
Note 1. Oscillators continue oscillating in deep sleep mode.
Note 2. When the frequency of the system clock is 32 MHz.
Note 3. When the frequency of the system clock is 12 MHz.
Note 4. When the frequency of the system clock is 32.768 kHz.
Oscillator
ICLK
IRQ
Deep sleep mode
t_DSLP
Figure 5.35 Deep Sleep Mode Cancellation Timing
Table 5.30 Timing of Recovery from Low Power Consumption Modes (5)
Operating Mode Transition Time
Conditions: 1.8 V ≤ VCC = VCC_USB ≤ 3.6 V, 1.8 V ≤ AVSS0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V, T_a = -40 to +105°C
Mode before Transition
Mode after Transition
Transition Time
ICLK Frequency
Unit
Min.
Typ.
Max.
High-speed operating mode
Middle-speed operating mode
8 MHz
—
10
—
μs
Middle-speed operating mode High-speed operating mode
8 MHz
—
37.5
—
μs
Low-speed operating mode
Middle-speed operating mode,
high-speed operating mode
32.768 kHz
—
213.62
—
μs
Middle-speed operating mode, Low-speed operating mode
high-speed operating mode
32.768 kHz
—
183.11
—
μs
Note: When the division ratios of PCLKB, PCLKD, FCLK, and ICLK are all set to 1.
R01DS0190EJ0130 Rev.1.30
May 31, 2016
Page 84 of 127