RX111_16 Datasheet, PDF (112/127 Pages) Renesas Technology Corp – 32 MHz 32-bit RX MCUs, 50 DMIPS, up to 512 Kbytes of flash memory

RX111 Group
5.11 E2 DataFlash Characteristics
5. Electrical Characteristics
Table 5.51 E2 DataFlash Characteristics (1)
Item
Reprogramming/erasure cycle*¹
Data hold time
After 10000 times of N_DPEC
After 100000 times of N_DPEC
After 1000000 times of N_DPEC
Symbol
N_DPEC
t_DDRP
Min.
100000
20*^2, *³
5*^2, *³
—
Typ.
1000000
—
—
1*^2, *³
Max.
—
—
—
—
Unit
Times
Year
Year
Year
Conditions
Ta = +85°C
Ta = +25°C
Note 1. The reprogram/erase cycle is the number of erasing for each block. When the reprogram/erase cycle is n times (n = 100000),
erasing can be performed n times for each block. For instance, when 1-byte programming is performed 1000 times for different
addresses in 1-byte block and then the entire block is erased, the reprogram/erase cycle is counted as one. However,
programming the same address for several times as one erasing is not enabled (overwriting is prohibited).
Note 2. Characteristics when using the flash memory programmer and the self-programming library provided from Renesas Electronics.
Note 3. These results are obtained from reliability testing.
Table 5.52 E2 DataFlash Characteristics (2)
: high-speed operating mode
Conditions: 2.7 V ≤ VCC ≤ 3.6 V, 2.7 V ≤ AVSS0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V
Temperature range for the programming/erasure operation: T_a = –40 to +105°C
FCLK = 1 MHz
FCLK = 32 MHz
Item
Symbol
Unit
Min.
Typ.
Max.
Min.
Typ.
Max.
Programming time
1-byte
Erasure time
1-Kbyte
8-Kbyte
Blank check time
1-byte
1-Kbyte
Erase operation forcible stop time
DataFlash STOP recovery time
t_DP1
—
86
761
—
40.5
374
μs
t_DE1K
—
17.4
456
—
6.15
228
ms
t_DE8K
—
60.4
499
—
9.3
231
ms
t_DBC1
—
—
48
—
—
15.9
μs
t_DBC1K
—
—
1.58
—
—
0.127 μs
t_DSED
—
—
21.5
—
—
12.8
μs
t_DSTOP
5
—
—
5
—
—
μs
Note: • Does not include the time until each operation of the flash memory is started after instructions are executed by software.
Note: • The lower-limit frequency of FCLK is 1 MHz during programming or erasing of the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note: • The frequency accuracy of FCLK should be ±3.5%. Confirm the frequency accuracy of the clock source.
Table 5.53 E2 DataFlash Characteristics (3)
: middle-speed operating mode
Conditions: 1.8 V ≤ VCC ≤ 3.6 V, 1.8 V ≤ AVSS0 ≤ 3.6 V, VSS = AVSS0 = VSS_USB = 0 V
Temperature range for the programming/erasure operation: T_a = –40 to +85°C
FCLK = 1 MHz
FCLK = 8 MHz
Item
Symbol
Unit
Min.
Typ.
Max.
Min.
Typ.
Max.
Programming time
1-byte
Erasure time
1-Kbyte
8-Kbyte
Blank check time
1-byte
1-Kbyte
Erase operation forcible stop time
DataFlash STOP recovery time
t_DP1
—
126
1160
—
85.4
818
μs
t_DE1K
—
17.5
457
—
7.76
259
ms
t_DE8K
—
60.5
500
—
16.7 267.6 ms
t_DBC1
—
—
78
—
—
50
μs
t_DBC1K
—
—
1.61
—
—
0.369 ms
t_DSED
—
—
33.5
—
—
25.5
μs
t_DSTOP
720
—
—
720
—
—
ns
Note: • Does not include the time until each operation of the flash memory is started after instructions are executed by software.
Note: • The lower-limit frequency of FCLK is 1 MHz during programming or erasing of the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note: • The frequency accuracy of FCLK should be ±3.5%. Confirm the frequency accuracy of the clock source.
R01DS0190EJ0130 Rev.1.30
May 31, 2016
Page 112 of 127