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HD151BF854 Datasheet, PDF (8/13 Pages) Renesas Technology Corp – 2.5 V PLL Clock Buffer for DDR Application | |||
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HD151BF854
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Conditions
Supply voltage
VDD
â0.5 to 3.6
V
Input voltage
Output voltage *1
VIC
â0.5 to 3.6
V
CLKIN
VI
â0.5 to
V
VDD+0.5
VO
â0.5 to
V
VDD+0.5
Input clamp current
Output clamp current
Continuous output current
Maximum power dissipation
at Ta = 55°C (in still air)
IIK
â50
mA
VI < 0
IOK
â50
mA
VO < 0
IO
±50
mA
VO = 0 to VDD
0.7
W
Storage temperature
Tstg
â65 to +150 °C
Notes:
Stresses beyond those listed under âabsolute maximum ratingsâ may cause permanent damage
to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated under ârecommended operating conditionsâ is not
implied. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
Recommended Operating Conditions
Item
Symbol Min
Typ
Max
Unit Conditions
Supply voltage
AVDD 2.3
2.5
2.7
V
Output supply voltage
VDD
2.3
2.5
2.7
V
DC input signal voltage
â0.3
â
VDD+0.3 V All pins
High level input voltage
VIH
High level input voltage
VIH
Low level input voltage
VIL
Output differential cross point VOX
voltage
1.7
â
1.7
â
â0.3
â
0.5ÃVDD â
â0.2
3.6
V
VDD+0.3 V
0.7
V
0.5ÃVDD V
+0.2
CLKIN
FBIN
CLKIN, FBIN
Output current
Input clock slew rate
IOH
â
â
â12
mA
IOL
â
â
12
SR
1
â
â
V/ns
Operating temperature
Ta
0
â
70
°C
Note: Unused inputs must be held high or low to prevent them from floating.
Rev.4, Jan. 2003, page 6 of 11
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