SH7047F Datasheet, PDF (69/85 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7047 Series

5.4 Software Description (Transmission)
Module Description
Module
Main routine
Reception interrupt
routine
DTC transfer end
interrupt routine
Label
Function
t_main
Performs initial settings and transmission settings for
HCAN-2.
RM1_IRR1
Clears reception end flag, prohibits reception interrupts,
and stored received data by triggering DTC.
DTC_SWDTEND Prohibits DTC triggering by software.
Description of Registers Used (See example 1 for information on pins and port registers.)
Register
MBbuff
work
HCAN_MCR
HCAN_IRR
HCAN_BCR0
HCAN_BCR1
HCAN_MB1.MC0
HCAN_MB1.MC4
HCAN_MB1.MC5
HCAN_MB1.LAFM15
HCAN_IMR
HCAN_MBIMR0
INTC.IPRK
INTC.IPRG
HCAN_TXPR0
HCAN_TXACK0
Function
Initial Value
Storage area for received data (address: ―
H'FFFFD100–H'FFFFD108).
Work register used for mailbox
―
initialization.
Clears reset request bit.
0x0000
Clears reset, hold, and sleep interrupt
flags. (To clear, write 1.)
0x0001
Sets bit rate to 250 kbps when φ is
50 MHz.
0x0009
0x4300
Sets remote frame and standard format 0x5558
for mailbox 1. Also sets identifier (H'555).
Sets mailbox 1 to allow remote frame 0x05
transmission and data frame reception.
Sets mailbox 1 transmission size to a
data length of 8 bytes.
0x08
Sets identifier filter mask for mailbox 1. 0x0000
Enables message reception interrupts. 0xFFFD
Enables mailbox 1 interrupt requests. 0xFFFD
Sets priority of HCAN-2 interrupt
requests.
0x00F0
Sets priority of DTC interrupt requests. 0x0E00
Sets mailbox 1 to transmission wait
status.
0x0002
Checks and clears mailbox 1
0x0002
transmission end flag. (To clear, write 1.)
Module
Main routine
Rev. 1.00, 08/03, page 61 of 74