SH7047F Datasheet, PDF (41/85 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7047 Series

3.7 Software Description (Reception)
Module
Main routine
Reception interrupt
routine
Label
r_main
RM1_IRR1
Function
Performs initial settings and reception settings for HCAN-2.
Clears reception end flag and sets interrupt prohibition.
Description of Registers Used (See example 1 for information on pins and port registers.)
Register
MBbuff
work
HCAN_MCR
HCAN_IRR
HCAN_BCR0
HCAN_BCR1
HCAN_MB0.MC0
HCAN_MB0.MC2
HCAN_MB0.MC4
HCAN_MB0.MC5
HCAN_MB0.LAFM15
HCAN_MB0.LAFM17
HCAN_IMR
HCAN_MBIMR0
INTC.IPRK
HCAN_RXPR0
HCAN_IMR
Function
Initial Value
Storage area for received data (address: ―
H'FFFFD100).
Work register used for mailbox initialization. ―
Module
Main routine
Clears reset request bit.
0x0000
Clears reset, hold, and sleep interrupt flags. 0x0001
(To clear, write 1.)
Sets bit rate to 250 kbps when φ is 50 MHz. 0x0009
0x4300
Sets data frame and extended format for 0x5556
mailbox 1. Also sets standard identifier
0xAAAA
(H'555) and extended identifier (H'2AAAA).
Sets mailbox 0 as for reception.
0x03
Sets mailbox 0 reception size to a data
length of 1 byte.
0x01
Sets identifier filter mask for mailbox 0.
0x0000
Sets identifier filter mask for mailbox 0.
0x0000
Enables message reception interrupts.
0xFFFD
Enables mailbox 0 interrupt requests.
0xFFFE
Sets priority of HCAN-2 interrupt requests. 0x00F0
Clears mailbox 0 reception end flag.
(To clear, write 1.)
Prohibits message reception interrupts.
0x0001
0xFFFF
Reception
interrupt
routine
Rev. 1.00, 08/03, page 33 of 74