SH7047F Datasheet, PDF (19/85 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7047 Series

Table 2.1 HCAN-2 Function Allocation
Register
Common
transmission
and reception
registers
Transmission
registers
Reception
register
Interrupt
registers
Function
MCR
Master control register
Controls operation of HCAN-2.
BCR0
Bit timing configuration registers
BCR1
Used to set baud rate prescaler and bit timing parameters of
CAN.
IRR
Interrupt request register
Shows status of interrupt sources.
MBx MC0 Message control register
Used to set identifier and whether frames are data frames or
remote frames.
MC4 Message control register
Used to select transmission or reception.
MC5 Message control register
Used to set the data length.
MD7 to Message data registers
MD14 _{Store transmitted and received CAN message data.}
LAFM15 Local acceptance filter mask
Used to set filter mask for identifier of reception mailbox.
TXPR
Transmission wait register
Used to set transmission wait status after transmitted message
is stored in mailbox.
TXACK
Transmission acknowledge register
Indicates that the transmitted message has been properly
transmitted to the corresponding mailbox.
RXPR
Reception end register
Indicates that the data has been properly received by the
corresponding mailbox.
MBIMR
Mailbox interrupt mask register
Used to enable interrupt requests for mailboxes.
IMR
Interrupt mask register
Used to enable interrupt requests using IRR interrupt flag.
IPRK
Interrupt priority register
Used to set the priority of HCAN-2 interrupt requests.
Rev. 1.00, 08/03, page 11 of 74