H8SX1638 Datasheet, PDF (641/1164 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 15 8-Bit Timers (TMR)
Initial
Bit
Bit Name Value R/W Description
1
OS1
0
R/W Output Select 1 and 0*²
0
OS0
0
R/W These bits select a method of TMO pin output when
compare match A of TCORA and TCNT occurs.
00: No change when compare match A occurs
01: 0 is output when compare match A occurs
10: 1 is output when compare match A occurs
11: Output is inverted when compare match A occurs
(toggle output)
Notes: 1. Only 0 can be written to bits 7 to 5, to clear these flags.
2. Timer output is disabled when bits OS3 to OS0 are all 0. Timer output is 0 until the first
compare match occurs after a reset.
3. For the corresponding A/D converter channels, see section 19, A/D Converter.
• TCSR_1
Initial
Bit
Bit Name Value
7
CMFB
0
R/W Description
R/(W)*¹ Compare Match Flag B
[Setting condition]
• When TCNT matches TCORB
[Clearing conditions]
• When writing 0 after reading CMFB = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
• When the DTC is activated by a CMIB interrupt while
the DISEL bit in MRB of the DTC is 0*³
Rev. 2.00 Sep. 10, 2008 Page 613 of 1132
REJ09B0364-0200