R10DS0216EJ0100 Datasheet, PDF (6/14 Pages) Renesas Technology Corp – 4Mb Advanced LPSRAM

RMLV0414E Series
Write Cycle
Parameter
Symbol
Min.
Max.
Unit
Note
Write cycle time
t_WC
45
─
ns
Address valid to write end
t_AW
35
─
ns
Chip select to write end
t_CW
35
─
ns
Write pulse width
t_WP
35
─
ns
10
LB#,UB# valid to write end
t_BW
35
─
ns
Address setup time to write start
t_AS
0
─
ns
Write recovery time from write end
t_WR
0
─
ns
Data to write time overlap
t_DW
25
─
ns
Data hold from write end
t_DH
0
─
ns
Output enable from write end
t_OW
5
─
ns
11
Output disable to output in high-Z
t_OHZ
0
18
ns
11,12
Write to output in high-Z
t_WHZ
0
18
ns
11,12
Note 10. t_WP is the interval between write start and write end.
A write starts when all of (CS#), (WE#) and (one or both of LB# and UB#) become active.
A write is performed during the overlap of a low CS#, a low WE# and a low LB# or a low UB#.
A write ends when any of (CS#), (WE#) or (one or both of LB# and UB#) becomes inactive.
11. This parameter is sampled and not 100% tested.
12. t_OHZ and t_WHZ are defined as the time when the I/O pins enter a high-impedance state and are not referred to
the I/O levels.
R10DS0216EJ0100 Rev.1.00
2014.2.27
Page 6 of 12