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R10DS0216EJ0100 Datasheet, PDF (5/14 Pages) Renesas Technology Corp – 4Mb Advanced LPSRAM
RMLV0414E Series
AC Characteristics
Test Conditions (Vcc = 2.7V ~ 3.6V, Ta = -40 ~ +85°C)
 Input pulse levels: VIL = 0.4V, VIH = 2.4V
 Input rise and fall time: 5ns
 Input and output timing reference level: 1.4V
 Output load: See figures (Including scope and jig)
I/O
1.4V
RL = 500 ohm
CL = 30 pF
Read Cycle
Parameter
Symbol
Min.
Max.
Unit
Note
Read cycle time
tRC
45
─
ns
Address access time
tAA
─
45
ns
Chip select access time
tACS
─
45
ns
Output enable to output valid
tOE
─
22
ns
Output hold from address change
tOH
10
─
ns
LB#, UB# access time
tBA
─
45
ns
Chip select to output in low-Z
tCLZ
10
─
ns
7,8
LB#, UB# enable to low-Z
tBLZ
5
─
ns
7,8
Output enable to output in low-Z
tOLZ
5
─
ns
7,8
Chip deselect to output in high-Z
tCHZ
0
18
ns
7,8,9
LB#, UB# disable to high-Z
tBHZ
0
18
ns
7,8,9
Output disable to output in high-Z
tOHZ
0
18
ns
7,8,9
Note 7. This parameter is sampled and not 100% tested.
8. At any given temperature and voltage condition, tCHZ max is less than tCLZ min, tBHZ max is less than tBLZ min,
and tOHZ max is less than tOLZ min, for any device.
9. tCHZ, tBHZ and tOHZ are defined as the time when the I/O pins enter a high-impedance state and are not
referred to the I/O levels.
R10DS0216EJ0100 Rev.1.00
2014.2.27
Page 5 of 12