H8S2117 Datasheet, PDF (515/968 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
(2) Serial Data Transmission
Figure 16.4 shows an example of the data transmission flowchart.
Initialization
Start transmission
Read THRE flag in FLSR
[1]
No
THRE = 1?
Yes
Write transmit data to FTHR
No
All data written
Yes
Read TEMT flag in FLSR
[2]
No
TEMT = 1
Yes
Break output
No
[3]
Yes
Set BREAK bit in FLCR to 1
[1] Confirm that the THRE flag in FLSR is 1, and write transmit
data to FTHR. When FIFOs are used, write 1-byte to 16-byte
transmit data. When the OUT2 bit in FMCR and the ETBEI bit
in FIER are set to 1, an FTHR empty interrupt occurs. When
data is written to FTHR, it is transferred automatically to FTSR.
The data is then transmitted from the FTxD pin in the order of
the start bit, transmit data, parity bit, and stop bit.
[2] Read the TEMT flag in FLSR, and confirm that TEMT is set to
1 to ensure that all transmit data has been transmitted.
[3] To output a break at the end of serial transmission, set the
BREAK bit in FLCR to 1. After completion of the break time,
clear the BREAK bit in FLCR to 0 to clear the break.
Break time completed
Yes
Clear BREAK bit in FLCR to 0
(End of transmission or transmission standby)
Figure 16.4 Example of Data Transmission Flowchart
Rev. 2.00 Feb. 20, 2008 Page 491 of 940
REJ09B0350-0200