H8S2117 Datasheet, PDF (441/968 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 15 Serial Communication Interface (SCI)
15.3.8 Smart Card Mode Register (SCMR)
SCMR selects smart card interface mode and its format.
Bit
Bit Name Initial Value R/W
7 to 4 
All 1
R
3
SDIR
0
R/W
2
SINV
0
R/W
1

1
R
0
SMIF
0
R/W
Description
Reserved
These bits are always read as 1 and cannot be
modified.
Smart Card Data Transfer Direction
Selects the serial/parallel conversion format.
0: TDR contents are transmitted with LSB-first.
Receive data is stored as LSB first in RDR.
1: TDR contents are transmitted with MSB-first.
Receive data is stored as MSB first in RDR.
The SDIR bit is valid only when the 8-bit data
format is used for transmission/reception; when
the 7-bit data format is used, data is always
transmitted/received with LSB-first.
Smart Card Data Invert
Specifies inversion of the data logic level. The
SINV bit does not affect the logic level of the
parity bit. When the parity bit is inverted, invert the
O/E bit in SMR.
0: TDR contents are transmitted as they are.
Receive data is stored as it is in RDR.
1: TDR contents are inverted before being
transmitted. Receive data is stored in inverted
form in RDR.
Reserved
This bit is always read as 1 and cannot be
modified.
Smart Card Interface Mode Select
When this bit is set to 1, smart card interface
mode is selected.
0: Normal asynchronous or clocked synchronous
mode
1: Smart card interface mode
Rev. 2.00 Feb. 20, 2008 Page 417 of 940
REJ09B0350-0200