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M32C85 Datasheet, PDF (507/542 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES | |||
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M32C/85 Group (M32C/85, M32C/85T)
27. Precautions (A/D Converter)
⢠AVCC = VREF = VCC1 ⥠VCC2,
A/D input voltage (for AN0 to AN7, AN150 to AN157, ANEX0, and ANEX1) ⤠VCC1,
A/D input voltage (for AN00 to AN07, and AN20 to AN27) ⤠VCC2.
⢠Wrong values are stored in the AD0i register (i=0 to 7) if the CPU reads the AD0i register while the AD0i
register stores results from a completed A/D conversion. This occurs when the CPU clock is set to a
divided main clock or a sub clock.
In one-shot mode or single sweep mode, read the corresponding AD0i register after verifying that the A/D
conversion has been completed. The IR bit in the AD0IC register determines the completion of the A/D
conversion.
In repeat mode, repeat sweep mode 0, repeat sweep mode 1, multi-port single sweep mode, and multi-
port repeat sweep mode 0, use an undivided main clock as the CPU clock.
⢠Conversion results of the A/D converter are indeterminate if the ADST bit in the AD0CON0 register is set
to "0" (A/D conversion stopped) and the conversion is forcibly terminated by program during the A/D
conversion. The AD0i register not performing the A/D conversion may also be indeterminate.
If the ADST bit is changed to "0" by program, during the A/D conversion, do not use any values obtained
from the AD0i registers.
⢠External triggers cannot be used in DMAC operating mode. Do not read the AD00 register by program.
⢠Do not perform the A/D conversion in wait mode.
⢠Set the MCD4 to MCD0 bits in the MCD register to "100102" (no division) if using the sample and hold
function.
⢠Do not acknowledge any interrupt requests, even if generated, before setting the ADST bit, if the A/D
conversion is terminated by setting the ADST bit in the AD0CON0 register to "0" (A/D conversion
stopped) while the microcomputer is A/D converting in single sweep mode.
Rev. 1.03 Jul. 01, 2005 Page 484 of 494
REJ09B0037-0103
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