M32C85 Datasheet, PDF (117/542 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/85 Group (M32C/85, M32C/85T)
9. Clock Generation Circuit
9.3.3 fC32
fC32 is the sub clock divided by 32. fC32 is used as a count source for the timers A and B. fC32 is available
when the sub clock is running.
9.3.4 fCAN
fCAN has the same frequency as the main clock. It is a clock for the CAN module only.
9.4 Clock Output Function
The CLKOUT pin outputs fC, f8 or f32.
In memory expansion mode or microprocessor mode, a clock having the same frequency as the CPU clock
can be output from the BCLK pin as BCLK.
Table 9.5 lists CLKOUT pin function in single-chip mode. Table 9.6 lists CLKOUT pin function in memory
expansion mode and microprocessor mode.
Table 9.5 CLKOUT Pin in Single-Chip Mode
PM0 Register ⁽¹⁾
CM0 Register ⁽²⁾
PM07 Bit
CM01 Bit
0
CM00 Bit
0
CLKOUT Pin Function
P53 I/O port
1
0
1
Outputs fc
1
1
0
Outputs f8
1
1
1
Outputs f32
- : Can be set to either "0" or "1"
NOTES:
1. Rewrite the PM0 register after the PRC1 bit in the PRCR register is set to "1" (write enable).
2. Rewrite the CM0 register after the PRC0 bit in the PRCR register is set to "1" (write enable).
Table 9.6 CLKOUT Pin in Memory Expansion Mode and Microprocessor Mode
PM1 Register⁽¹⁾
PM0 Register⁽¹⁾
PM15 Bit PM14 Bit
PM07 Bit
CM0 Register⁽²⁾
CM01 Bit CM00 Bit
CLKOUT Pin Function
0
0 ⁽³⁾
0 ⁽³⁾
Outputs BCLK
1
002, 102, 112,
1
0
0
Outputs "L" (not P53)
0
1
Outputs fc
1
1
0
Outputs f8
1
1
1
Outputs f32
0
1
0 ⁽³⁾
0 ⁽³⁾ Outputs ALE
- : Can be set to either "0" or "1"
NOTES:
1. Rewrite the PM1 and PM0 registers after the PRC1 bit in the PRCR register is set to "1" (write enable).
2. Rewrite the CM0 register after the PRC0 bit in the PRCR register is set to "1" (write enable).
3. When the PM07 bit is set to "0" (selected in the CM01 and CM00 bits) or the PM15 and PM14 bits are
set to "012" (P53/BCLK), set the CM01 and CM00 bits to "002" (I/O port P53).
4. M32C/85T cannot be used in memory expansion mode and microprocessor mode.
Rev. 1.03 Jul. 01, 2005 Page 94 of 494
REJ09B0037-0103