M32C87 Datasheet, PDF (457/627 Pages) Renesas Technology Corp – MCU M16C FAMILY / M32C/80 SERIES

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
23. CAN Module
CANi Global Mask Register Extended ID1⁽¹⁾ (i = 0,1)
CANi Local Mask Register A Extended ID1⁽¹⁾
CANi Local Mask Register B Extended ID1⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
C0GMR3, C1GMR3
C0LMAR3, C1LMAR3
C0LMBR3, C1LMBR3
Address
022Bh, 02ABh
0233h, 02B3h⁽³⁾
023Bh, 02BBh⁽⁴⁾
Bit Symbol
Bit Name
EID6M Extended ID6
Function
0: ID not checked
1: ID checked
EID7M Extended ID7
EID8M Extended ID8
EID9M Extended ID9
EID10M Extended ID10
EID11M Extended ID11
EID12M Extended ID12
EID13M Extended ID13
After Reset⁽²⁾
00h
00h
00h
RW
RW
RW
RW
RW
RW
RW
RW
RW
NOTES:
1. Registers CiGMR3, CiLMAR3, and CiLMBR3 can be accessed when the BANKSEL bit in the CiCTLR1 register is set to 1 (mask
register selected).
2. Value is obtained by setting the SLEEP bit in the CiSLPR register to 1 (sleep mode exited) after reset, supplying the clock to the
CAN module, and setting the BANKSEL bit to 1.
3. The C0LMAR3 register shares the same address with the C0MCTL3 register, and the C1LMAR3 register with the C1MCTL3 register.
4. The C0LMBR3 register shares the same address with the C0MCTL11 register, and the C1LMBR3 register with the C1MCTL11
register.
Figure 23.26 C0GMR3, C1GMR3, C0LMAR3, C1LMAR3, C0LMBR3, and C1LMBR3 Registers
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
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