M32C87 Datasheet, PDF (168/627 Pages) Renesas Technology Corp – MCU M16C FAMILY / M32C/80 SERIES

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
13. DMAC
Start
Set the peripheral function
used as DMAi request source
DMD0 register: bits MD01 and MD00 = 00b
bits MD11 and MD10 = 00b
DMiSL register: bits DSEL4 to DSEL0
DSR bit = 0
DRQ bit = 1
DMAi register
DSAi register
<When using repeat transfer>
DRAi register
Set the control registers of the peripheral function,
but do not yet start.
DMA disabled for channel 0
DMA disabled for channel 1
Write with LDC instruction
DMA request source select bits
DMA requested
Set an incremented source address or
incremented destination address
Set a fixed source address or
fixed destination address
(note 1)
Write with LDC instruction
Set an incremented source address or
incremented destination address
Write with LDC instruction
DCTi register
<When using repeat transfer>
DRCi register
Set the number of transfers⁽²⁾
Write with LDC instruction
Set the number of transfers, which is to be
reloaded
Write with LDC instruction
DMD0 register: bits MD01 and MD00
BW0 bit
RW0 bit
bits MD11 and MD10
BW1 bit
RW1 bit
Start the peripheral function
used as DMAi request source
End
Transfer mode select bits for channel 0
Transfer unit select bit for channel 0
Transfer direction select bit for channel 0
Transfer mode select bits for channel 1
Transfer unit select bit for channel 1
Transfer direction select bit for channel 1
(note 4)
Write with LDC instruction
(note 3)
i = 0, 1
NOTES:
1. When setting the DMiSL register, write a 1 to the DRQ bit.
2. When the INT interrupts are selected as a DMA request source, do not write a 1 to the DCTi register. If the DCTi register is
1, do not generate a DMA request when writing 01b or 11b to bits MDi1 and MDi0.
3. Wait six CPU clock cycles or more by a program to set bits MDi1 and MDi0 to 01b or 11b after setting the DMiSL register.
4. When a DMA transfer is started by the software trigger, set both the DSR and DRQ bit in the DMiSL register to 1 at the
same time.
Figure 13.7 Register Settings When Using DMA0 or DMA1
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
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