M32C87 Datasheet, PDF (166/627 Pages) Renesas Technology Corp – MCU M16C FAMILY / M32C/80 SERIES

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
13. DMAC
DMA Mode Register 0⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
DMD0
Address
(CPU internal register)
After Reset
00h
Bit Symbol
Bit Name
Function
RW
MD00
b1 b0
0 0: DMA disabled
RW
Channel 0
0 1: Single transfer
transfer mode select bits
1 0: Do not set to this value
MD01
1 1: Repeat transfer
RW
BW0
Channel 0
transfer unit select bit
0: 8 bits
1: 16 bits
RW
RW0
Channel 0
transfer direction select bit
0: Fixed address to incremented address
1: Incremented address to fixed address
RW
MD10
b5 b4
0 0: DMA disabled
RW
Channel 1
0 1: Single transfer
transfer mode select bits
1 0: Do not set to this value
MD11
1 1: Repeat transfer
RW
BW1
Channel 1
transfer unit select bit
0: 8 bits
1: 16 bits
RW
RW1
Channel 1
transfer direction select bit
0: Fixed address to incremented address
1: Incremented address to fixed address
RW
NOTE:
1. Use the LDC instruction to set the DMD0 register.
Figure 13.5 DMD0 Register
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
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