M32C87 Datasheet, PDF (126/627 Pages) Renesas Technology Corp – MCU M16C FAMILY / M32C/80 SERIES

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
9. Clock Generation Circuits
9.6 System Clock Protect Function
The system clock protect function prohibits the clock setting from being rewritten in order to prevent the CPU
clock source from being changed when a program goes out of control.
When the PM21 bit in the PM2 register is set to 1 (disables a clock change), the following bits cannot be written:
• Bits CM02, CM05, and CM07 in the CM0 register
• Bits CM10 and CM17 in the CM1 register
• The CM20 bit in the CM2 register
• All bits in registers PLC0 and PLC1
The CPU clock continues running when the WAIT instruction is executed.
Figure 9.16 shows a procedure to use the system clock protect function. Follow the procedure while the CM05 bit
in the CM0 register is set to 0 (main clock oscillates) and the CM07 bit to 0 (main clock as CPU clock source).
Start
PRCR register: PRC1 bit = 1
PM2 register: PM21 bit = 1
PRCR register: PRC1 bit = 0
(Note 1)
Enable writing to registers associated with clocks
Disable a clock change
Disable writing to registers associated with clocks
End
NOTE:
1. When entering wait mode, execute the WAIT instruction while the PM21 bit in the PM2 register is set to 0.
Figure 9.16 Procedure to Use System Clock Protect Function
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
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