SH7262 Datasheet, PDF (36/45 Pages) Renesas Technology Corp – High-speed Read/Write Serial Flash Memory

SH7262/SH7264 Group
High-speed Read/Write Serial Flash Memory
Using the Renesas Serial Peripheral Interface
3.18 Sample Program Listing "serial_flash.c" (15/19)
593 /*""FUNC COMMENT""**************************************************************
594
* ID
:
595
* Outline
: Execute command (With read data, longword transfer).
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*------------------------------------------------------------------------------
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* Include
:
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*------------------------------------------------------------------------------
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* Declaration : static void io_cmd_exe_rdmode_cpu_l(unsigned char *ope, int ope_sz,
600
*
:
unsigned long *rd, int rd_sz);
601
*------------------------------------------------------------------------------
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* Description : Executes the specified command.
603
*
: Transmits the argument ope, and then receives data in the argument rd.
604
*
: Transfer the read data in units of longword.
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*
: Set one of the values between 0 and 8 in the ope_sz.
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*
: Although more than 0 can be set in the rd_sz, set the value
607
*
: in multiples of 4.
608
*------------------------------------------------------------------------------
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* Argument
: unsigned long *ope ; I : Start address of the opcode block and
610
*
address block to transmit
611
*
: int ope_sz
; I : Number of bytes in the opcode block and
612
*
: address block
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*
: unsigned long *rd ; I : Buffer address to store the received data
614
*
: int rd_sz
; I : Number of bytes in the data block
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*------------------------------------------------------------------------------
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* Return Value : void
617
*------------------------------------------------------------------------------
618
* Note
: None
619
*""FUNC COMMENT END""**********************************************************/
620 static void io_cmd_exe_rdmode_cpu_l(unsigned char *ope, int ope_sz, unsigned long *rd, int
621 rd_sz)
622 {
623
/* ==== Resets buffer ==== */
624
RSPI0.SPBFCR.BYTE = 0xC0u;
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RSPI0.SPBFCR.BYTE = 0x00u;
626
627
/* ---- Enables the SPI transfer ---- */
628
RSPI0.SPCR.BIT.SPE = 1;
629
630
/* ---- MOSI (command, address, dummy) ---- */
631
RSPI0.SPCMD0.BIT.CPOL= 1;
/* RSPCK when idling is 1 */
632
RSPI0.SPCMD0.BIT.CPHA= 0;
/* Outputs data on even (rising) edge */
633
634
while(ope_sz--){
635
RSPI0.SPDR.BYTE = *ope++; /* Command size must be equal or less than 8 bytes */
636
}
637
io_wait_tx_end();
/* Waits for transfer end */
REJ06B0889-0100/Rev.1.00
June 2009
Page 36 of 45