H8S2138 Datasheet, PDF (334/1061 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

Section 11 16-Bit Free-Running Timer
Bit 5
ICFC
0
1
Description
[Clearing condition]
Read ICFC when ICFC = 1, then write 0 in ICFC
[Setting condition]
When an input capture signal is received
(Initial value)
Bit 4—Input Capture Flag D (ICFD): This status flag indicates that the FRC value has been
transferred to ICRD by means of an input capture signal. When BUFEB = 1, on occurrence of the
signal transition in FTID (input capture signal) specified by the IEDGD bit, ICFD is set but data is
not transferred to ICRD. Therefore, in buffer operation, ICFD can be used as an external interrupt
by setting the ICIDE bit to 1.
ICFD must be cleared by software. It is set by hardware, however, and cannot be set by software.
Bit 4
ICFD
0
1
Description
[Clearing condition]
Read ICFD when ICFD = 1, then write 0 in ICFD
[Setting condition]
When an input capture signal is received
(Initial value)
Bit 3—Output Compare Flag A (OCFA): This status flag indicates that the FRC value matches
the OCRA value. This flag must be cleared by software. It is set by hardware, however, and
cannot be set by software.
Bit 3
OCFA
0
1
Description
[Clearing condition]
Read OCFA when OCFA = 1, then write 0 in OCFA
[Setting condition]
When FRC = OCRA
(Initial value)
Rev. 4.00 Jun 06, 2006 page 280 of 1004
REJ09B0301-0400