PD16782A_15 Datasheet, PDF (20/29 Pages) Renesas Technology Corp – SOURCE DRIVER FOR 300/288-OUTPUT TFT-LCD

µPD16782A
5.1.5 Relation between Shift Clock CLIn and Internal Sampling Pulse SHPn
(1) Simultaneous sampling ( ( ) indicates the case of left shift.)
CLI1
STHR (STHL)
SHP1 (SHP300)
SHP2 (SHP299)
SHP3 (SHP298)
SHP4 (SHP297)
SHP5 (SHP296)
SHP6 (SHP295)
Remark C1 through C3 are sampled while SHPn is high level.
C1 sampling
C2 sampling
C3 sampling
C1 sampling
C2 sampling
C3 sampling
(2) Sequential sampling ( ( ) indicates the case of left shift.)
CLI1
CLI2
CLI3
STHR (STHL)
SHP1 (SHP300)
SHP2 (SHP299)
SHP3 (SHP298)
SHP4 (SHP297)
SHP5 (SHP296)
SHP6 (SHP295)
3-phase clock
C1 sampling
C2 samling
C3 sampling
C1 sampling
C2 sampling
C3 sampling
Remarks 1. Input a three-phase clock to shift clock pins CLI1 to CLI3.
2. The video signals (C1 to C3) are sampled while SHPn is high level.
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Data Sheet S16593EJ1V0DS