RX62N Datasheet, PDF (2/25 Pages) Renesas Technology Corp – 100 MHz 32-bit RX MCU with FPU, 165 DMIPS, up to 512-Kbyte Flash, Ethernet, USB 2.0

RX62N Group and RX621 Group
16-Bit SDRAM Connection and Access Examples
1. Specifications
The SDRAM interface included in the RX62N and RX621 Group microcontrollers allows the direct connection of up to
128 MB (1024 Mbits) of SDRAM. This interface supports SDRAM with a CAS latency of 1 to 3 cycles.
This application note uses a Micron Technology 128 Mbit SDRAM (the 2 Mword × 16 bit × 4 bank
MT48LC8M16A2P-75), and connects to it over a 16-bit bus.
Figure 1 shows a sample DRAM connection diagram and Table 1 lists the SDRAM specifications.
RX62N
A14-A13
A12-A1
D15-D0
SDCS#
RAS#
CAS#
WE#
CKE
SDCLK
DQM0
DQM1
SDRAM
MT48LC8M16A2P-75
2M-word × 16bit × 4bank
2
BA1-0
12
A11-A0
16
DQ15-DQ0
CS#
RAS#
CAS#
WE#
CKE
CLK
DQML
DQMH
Figure 1 16-bit SDRAM Connection
Table 1 SDRAM Specifications
Item
Catalog number
Structure
Capacity
Row address lines
Column address lines
Auto refresh interval
CAS latency
Initialization auto refresh count
Auto refresh period
Write recovery period
Precharge command period
Period from active command to
precharge command
Delay time from active command to
read/write command
Symbol








(tRFC)
(tWR)
(tRP)
(tRAS)
(tRCD)
Description
MT48LC8M16A2P-75 (Micron Technology, Inc)
2 Mwords × 16 bits × 4 banks
128 MB
A11-A0
A8-A0
4096 refresh cycles every 64 ms
2/3
2 times
66 ns (min)
28.33 ns (min)
20 ns (min)
44 ns (min)
20 ns (min)
R01AN0585EJ0202 Rev.2.02
Feb 14, 2014
Page 2 of 22