RX62N Datasheet, PDF (14/25 Pages) Renesas Technology Corp – 100 MHz 32-bit RX MCU with FPU, 165 DMIPS, up to 512-Kbyte Flash, Ethernet, USB 2.0

RX62N Group and RX621 Group
(3) I/O ports
16-Bit SDRAM Connection and Access Examples
Port function register 3 (PF3BUS) Bits: 8, Address: 0008 C103h
Bit
Symbol Setting Name
Function
R/W
b0
A16E
0
Address A16 output enable 0: A16 output disabled
R/W
bit
b1
A17E
0
Address A17 output enable 0: A17 output disabled
R/W
bit
b2
A18E
0
Address A18 output enable 0: A18 output disabled
R/W
bit
b3
A19E
0
Address A19 output enable 0: A19 output disabled
R/W
bit
b4
A20E
0
Address A20 output enable 0: A20 output disabled
R/W
bit
b5
A21E
0
Address A21 output enable 0: A21 output disabled
R/W
bit
b6
A22E
0
Address A22 output enable 0: A22 output disabled
R/W
bit
b7
A23E
0
Address A23 output enable 0: A23 output disabled
R/W
bit
Port function register 4 (PF4BUS) Bits: 8, Address: 0008 C104h
Bit
Symbol Setting Name
Function
R/W
b1-0
ADRLE 11
Address low-order A9 to A0 11: A9 to A0 output enabled
R/W
[1:0]
output enable bits
b2
A10E
1
Address A10 output enable 0: A10 output enabled
R/W
bit
b3
A11E
1
Address A11 output enable 0: A11 output enabled
R/W
bit
b4
A12E
1
Address A12 output enable 0: A12 output enabled
R/W
bit
b5
A13E
1
Address A13 output enable 0: A13 output enabled
R/W
bit
b6
A14E
1
Address A14 output enable 0: A14 output enabled
R/W
bit
b7
A15E
0
Address A15 output enable 0: A15 output disabled
R/W
bit
Port function register 5 (PF5BUS) Bits: 8, Address: 0008 C105h
Bit
Symbol Setting Name
Function
R/W
b4
DHE
1
Data D15 to D8 enable bit
1: PE7 to PE0 set to function as
R/W
external bus D15 to D8.
b5
DHE32E 0
Data D31 to D16 enable bit 0: PG7 to PG0 and P97 to P90 set R/W
to function as I/O ports.
R01AN0585EJ0202 Rev.2.02
Feb 14, 2014
Page 14 of 22