RX62N Datasheet, PDF (13/25 Pages) Renesas Technology Corp – 100 MHz 32-bit RX MCU with FPU, 165 DMIPS, up to 512-Kbyte Flash, Ethernet, USB 2.0

RX62N Group and RX621 Group
16-Bit SDRAM Connection and Access Examples
5.4 Registers Used
The tables below lists the registers used by this application note. Note that the setting values shown are the ones used in
this application note and differ from the initial values.
(1) Clock generation circuit
System clock control register (SCKCR) Bits: 32, Address: 0008 0020h
Bit
Symbol Setting Name
Function
R/W
b11-b8 PCK[3:0] 0001 Peripheral module clock
0001: × 4
R/W
selection bits
PCLK = 48 MHz
(When the EXTAL clock is 12 MHz)
b19-b16 BCK[3:0] 0001 External bus clock and
0001: × 4
R/W
SDRAM selection bits
BCLK, SDCLK = 48 MHz
(When the EXTAL clock is 12 MHz)
b22
PSTOP0 0
SDCLK pin output control bit 0: SDCLK output pin operates
R/W
b27-b24 ICK[3:0] 0000 System clock selection bits 0000: × 8
R/W
ICLK = 96 MHz
(When the EXTAL clock is 12 MHz)
(2) Operating mode
System control register 0 (SYSCR0) Bits: 8, Address: 0008 0006h
Bit
b0
b1
b15-b8
Symbol
ROME
EXBE
KEY[7:0]
Setting
1
1
5Ah
Name
Internal ROM enable bit
External bus enable bit
SYSCR0 key code
Function
R/W
1: Internal ROM enabled
R/W
1: External bus enabled
R/W
5Ah: SYSCR0 register write enabled R/W
R01AN0585EJ0202 Rev.2.02
Feb 14, 2014
Page 13 of 22